The present invention relates to a cache flush system and the method for a
cache flush performed in cache memory against at least one corresponding
prescribed event in a multi-processor system. Embodiments of the present
invention can reduce or minimize loads of a processor bus by performing
memory read of at most a prescribed size and can increase
simultaneousness of cache flush against a corresponding prescribed event
by performing a cache flush directly triggered by the prescribed event
thereby enabling high speed and automated cache flush algorithm.